Bit line charge accumulation sensing for resistive changing memory
AssigneeSeagate Technology LLC
InventorsChulmin Jung, Yong Lu, Kang Yong Kim, Young Pil Kim
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AssigneeSeagate Technology LLC
InventorsChulmin Jung, Yong Lu, Kang Yong Kim, Young Pil Kim
Estimating the term…
A memory array includes a plurality of magneto-resistive changing memory cells. Each resistive changing memory cell is electrically between a source line and a bit line and a transistor electrically between the resistive changing memory cell and the bit line. The transistor has a gate electrically between a source region and a drain region and the source region being electrically between the magneto-resistive changing memory cell and the gate. A word line is electrically coupled to the gate. A bit line charge accumulation sensing for magneto-resistive changing memory is also disclosed.
A memory array comprising:
A memory array comprising:
A method of sensing a data state of resistive changing memory, comprising steps of:
Dependencies are inferred from the claim text.