Semiconductor memory device and manufacturing method thereof

A semiconductor memory device comprising:

• a supporting substrate;
• an insulation film provided on the supporting substrate;
• a source layer provided on the insulation film;
• a drain layer provided on the insulation film;
• a body region provided between the source layer and the drain layer and being in an electrically floating state, the body region accumulating electric charges or discharging electric charges in order to store data;
• a boundary gate dielectric film provided at least on a boundary portion between the body region and the source layer and on a boundary portion between the body region and the drain layer, the boundary gate dielectric film having an interface state density lower than 1011eV−1cm−2;
• and
• a center gate dielectric film provided adjacently to the boundary gate dielectric film on the body region, the center gate dielectric film having an interface state density equal to or higher than 1011eV−1cm−2.

A method of manufacturing a semiconductor memory device comprising as memory cells a plurality of FETs comprising a body region provided between a source layer and a drain layer and in an electrically floating state to accumulate electric charges or to discharge electric charges in order to store data, the method comprising:

• forming a center gate dielectric film on a semiconductor layer provided on an insulation film;
• forming first gate electrodes on the center gate dielectric film;
• etching a side surface of the first gate electrodes in order to narrow a width of the first gate electrodes in a channel length direction of the memory cells;
• etching the center gate dielectric film by using the first gate electrodes as a mask;
• forming a boundary gate dielectric film on the semiconductor layer exposed;
• forming second gate electrodes on a side wall of the first gate electrodes;
• and
• forming the source layer and the drain layer by introducing an impurity into the semiconductor layer by using the first gate electrodes and the second gate electrodes as a mask, wherein
• the boundary gate dielectric film is on a boundary portion between the body region and the source layer and on a boundary portion between the body region and the drain layer, and
• the center gate dielectric film is provided adjacently to the boundary gate dielectric film on the body region.

A method of manufacturing a semiconductor memory device comprising as memory cells a plurality of FETs comprising a body region provided between a source layer and a drain layer and in an electrically floating state to accumulate electric charges or to discharge electric charges in order to store data, the method comprising:

• forming a boundary gate dielectric film on a semiconductor layer provided on an insulation film;
• forming a mask material on the boundary gate dielectric film;
• removing a part of the mask material on a forming region of a gate electrode of the FET to expose the boundary gate dielectric film;
• forming first gate electrodes on side surfaces of the mask material in the forming region of the gate electrode;
• forming a center gate dielectric film by nitriding the boundary gate dielectric film using the mask material and the first gate electrodes as a mask;
• filling the forming region of the gate electrode of the FET with a material of a second gate electrode;
• removing the mask material;
• and
• forming the source layer and the drain layer by introducing an impurity into the semiconductor layer by using the first gate electrodes and the second gate electrodes as a mask, wherein
• the boundary gate dielectric film is on a boundary portion between the body region and the source layer and on a boundary portion between the body region and the drain layer, and
• the center gate dielectric film is provided adjacently to the boundary gate dielectric film on the body region.

A method of manufacturing a semiconductor memory device comprising as memory cells a plurality of FETs comprising a body region provided between a source layer and a drain layer and in an electrically floating state to accumulate electric charges in order to store data or to discharge electric charges, the method comprising:

• forming a center gate dielectric film on a semiconductor layer provided on an insulation film;
• forming gate electrodes on the center gate dielectric film;
• etching the center gate dielectric film by using the gate electrodes as a mask in order to narrow a width of the center gate dielectric film in a channel length direction of the FETs;
• forming a boundary gate dielectric film so as to be adjacent to the center gate dielectric film below the gate electrodes;
• and
• forming the source layer and the drain layer by introducing an impurity into the semiconductor layer by using the gate electrodes as a mask, wherein
• the boundary gate dielectric film is on a boundary portion between the body region and the source layer and on a boundary portion between the body region and the drain layer, and
• the center gate dielectric film is provided adjacently to the boundary gate dielectric film on the body region.