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US 2010/0133593 A1Published application
Junction Field Effect Transistor Having a Double Gate Structure and Method of Making Same
AssigneeDSM Solutions, Inc.
InventorSrinivasa R. Banna
Life of this patent
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Abstract
A junction field effect transistor includes a channel region, a gate region coupled to the channel region, a well tap region coupled to the gate region and the channel region, and a well region coupled to the well tap region and the channel region. A double gate operation is achieved by this structure as a voltage applied to the gate region is also applied to the well region through the well tap region in order to open the channel from both the gate region and the well region.
Claims20
A junction field effect transistor, comprising:
- a channel region;
- a gate region coupled to the channel region;
- a well tap region coupled to the gate region and the channel region;
- a well region coupled to the well tap region and the channel region.
1 more element
A method of fabricating a junction field effect transistor, comprising:
- forming a channel region on a substrate;
- forming a well region within the substrate and below the channel region;
- forming a well tap region within the substrate into the well region and adjacent to the channel region;
- forming a gate region above the channel region.
1 more element
Dependencies are inferred from the claim text.