Isolation method and package using a high isolation differential ball grid array (bga) pattern
AssigneeThe Boeing Company
InventorLOUIS CATUOGNO
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Abstract
According to an embodiment an improved Application Specific Integrated Circuit (ASIC) isolation method and system for assigning signal pins in an ASIC package having a plurality of signal pins is disclosed. The method and system comprise identifying an isolation requirement of the ASIC and determining an optimized pattern for substantially diagonal pairing of signal pins in relation to the isolation requirement. The method includes pairing signal pairs substantially diagonally in accordance with the pattern.
Claims20
An improved Application Specific Integrated Circuit (ASIC) isolation method for assigning signal pins in an ASIC package having a plurality of signal pins, comprising:
- identifying an isolation requirement of the ASIC;
- determining an optimized pattern for substantially diagonal pairing of signal pins in relation to the isolation requirement;
- and,
- pairing signal pairs substantially diagonally in accordance with the pattern.
A method of determining an optimized Application Specific Integrated Circuit (ASIC) signal pin layout having improved isolation, comprising:
- identifying an isolation requirement of the ASIC;
- determining an acceptable area for the ASIC;
- substantially diagonally pairing one or more signal pins in relation to the isolation requirement;
- and,
- one or more of:
- adding proximately perpendicular signal pins to substantially diagonally-paired signal pairs wherein proximately perpendicular signal pins are along a first diagonal line perpendicularly extending from the substantially diagonally-paired signal pair, moving signal pins not residing along the first diagonal line away from the respective substantially diagonally-paired signal pins;
- and,
- adding isolation spacing or ground pins proximate to respective substantially diagonally-paired signal pairs.
An apparatus comprising an Application Specific Integrated Circuit (ASIC) having a plurality of signal pins configured to be arranged such that one or more signal pins are substantially diagonally paired, wherein at least one substantially diagonally paired signal pin pair is determined as being a paired candidate by:
- identifying an isolation requirement of the ASIC;
- determining an acceptable area for the ASIC;
- and
- determining a candidacy of substantially diagonally pairing one or more signal pins in relation to the isolation requirement.
Dependencies are inferred from the claim text.