Semiconductor memory device
AssigneeHynix Semiconductor Inc.
InventorsKi-Chon PARK, Byoung-Jin CHOI
Life of this patent
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Abstract
Disclosed is a semiconductor memory device includes a selector for selectively loading read inversion information and write inversion information on an inversion bus, the inversion bus for transferring the inversion information loaded by the selector, a plurality of read inversion units for reflecting the inversion information from the inversion bus to output data, and a plurality of write inversion units for reflecting the inversion information from the inversion bus to input data.
Claims13
A semiconductor memory device, comprising:
- a selector for selectively loading read inversion information and write inversion information on an inversion bus;
- the inversion bus for transferring the inversion information loaded by the selector;
- a plurality of read inversion units for reflecting the inversion information from the inversion bus to output data;
- and
- a plurality of write inversion units for reflecting the inversion information from the inversion bus to input data.
A semiconductor memory device, comprising:
- an inversion generator for generating read inversion information;
- an inversion input circuit for receiving write inversion information;
- a selector for selectively loading the read inversion information transferred from the inversion generator and the write inversion information from the inversion input circuit on an inversion bus;
- the inversion bus for transferring the inversion information loaded by the selector;
- a plurality of data output circuits for outputting data reflected with the inversion information from the inversion bus;
- and
- a plurality of data input circuits for reflecting the inversion information from the inversion bus to input data.
A semiconductor memory device, comprising:
- an inversion generator for generating read inversion information;
- an inversion input circuit for receiving write inversion information;
- a selector for selectively loading the read inversion information from the inversion generator and the write inversion information from the inversion input circuit on an inversion bus;
- the inversion bus for transferring the inversion information loaded by the selector;
- a plurality of data output circuits for reflecting the read inversion information from the inversion bus on data and outputting the data;
- and
- an input/output unit included in each of banks for reflecting the write inversion information from the inversion bus on input data.
Dependencies are inferred from the claim text.