Semiconductor device including asymmetric sense amplifier

Abstract

A semiconductor device includes an alternating arrangement of memory cell blocks and sense amplifier blocks, such that the sense amplifier blocks include an interior sense amplifier block and a periphery amplifier block. The peripheral amplifier block includes a first sense amplification unit having a first sense amplifier and a second sense amplifier cross-coupled between a bit line and a complementary bit line. The first sense amplifier supplies/receives current to/from the bit line, the second sense amplifier provides/receives current to/from the complementary bit line, and a current driving capability for the first sense amplifier is greater than a current driving capability of the second sense amplifier.

Dependencies are inferred from the claim text.