Method and Apparatus for Measuring Statistics of Dram Parameters with Minimum Perturbation to Cell Layout and Environment

A computer-readable medium having computer-executable instructions for performing a method for measuring statistics of random access memory (DRAM) process parameters, comprising:

• selecting a storage cell of a DRAM;
• measuring a capacitance of the storage cell (Ccell);
• measuring a local bitline capacitance (Cbl);
• and
• measuring a transfer device voltage (VT) of the storage cell;
• and
• simulating a storage cell of the DRAM according to the measured storage cell capacitance (Ccell), the local bitline capacitance (Cbl), and the transfer device voltage (VT) to determine a data leakage, a data retention time, and a transfer ratio of the storage cell for DRAM design and production optimization.

A method for measuring statistics of dynamic random access memory (DRAM) process parameters for promoting optimized yield and performance of a DRAM, comprising:

• charging a local bitline and a storage cell to a positive supply voltage (Vdd);
• measuring a capacitance of the storage cell (Ccell);
• measuring the local bitline capacitance (Cbl);
• measuring the transfer device voltage (VT) of the storage cell;
• and
• simulating a storage cell of the DRAM according to the measured storage cell capacitance (Ccell), the local bitline capacitance (Cbl), and the transfer device voltage (VT) to determine a data leakage, a data retention time, and a transfer ratio of the storage cell for DRAM design and production optimization.