Coreless substrate, method of manufacturing same, and package for microelectronic device incorporating same

A package for a microelectronic device, the package comprising:

• a stiffener material layer having plated vias formed therein and further having a recess therein;
• build-up layers over the stiffener material layer, the build-up layers comprising electrically insulating material and electrically conductive material;
• and
• a die attached over the build-up layers,
• wherein:
• the stiffener material layer and the build-up layers form a coreless substrate of the package;
• the coreless substrate has a surface;
• and
• the die covers less than all of the surface of the coreless substrate such that the surface has at least one exposed region.

A method of manufacturing a coreless substrate, the method comprising:

• providing a preliminary structure comprising a core material coated on two opposing sides with an electrically conductive film;
• forming raised areas of a first electrically conductive material on the electrically conductive film;
• forming a spacer over a portion of the electrically conductive film;
• applying stiffener material adjacent to the spacer and over the raised areas of the first electrically conductive material;
• forming vias in the stiffener material and plating the vias with a second electrically conductive material;
• forming build-up layers over the spacer and the stiffener material;
• separating the preliminary structure into a first piece and a second piece;
• and
• removing the core material, the spacer, and the electrically conductive film from the first piece and the second piece.