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US 2010/0072544 A1Published application
Method of forming an mos transistor and structure therefor
AssigneeSemiconductor Components Industries, LLC
InventorsJeffrey Pearse, Prasad Venkatraman, James Sellers, Hemanshu D. Bhatt
Life of this patent
Estimating the term…
Abstract
In one embodiment, an MOS transistor is formed to have an active region and a termination region. Within the termination region a plurality of conductors are formed to make electrical contact to conductors that are within a plurality of trenches. The plurality of conductors in the termination region are formed to be substantially coplanar.
Claims20
An MOS transistor comprising:
- a semiconductor substrate having a surface;
- an active region of the MOS transistor;
- a plurality of active trenches formed in the semiconductor substrate and within the active region wherein each active trench of the plurality of active trenches includes a shield conductor and an overlying gate conductor;
- a source region formed as a first doped region on the surface of the semiconductor substrate adjacent to each active trench;
- a termination region that is external to the active region;
- a shield contact trench formed in the semiconductor substrate and within the termination region, the shield contact trench having a first conductor within the shield contact trench;
- a gate contact trench formed in the semiconductor substrate and positioned near both the shield contact trench and at least one active trench of the plurality of active trenches, the gate contact trench having a second conductor within the gate contact trench and wherein no source region is adjacent to the gate contact trench;
- a source conductor overlying the plurality of active trenches and forming electrical contact to the source region of each active trench of the plurality of active trenches;
- a third conductor overlying the shield contact trench and forming electrical contact to the first conductor;
- and
- a fourth conductor overlying the gate contact trench and forming electrical contact to the second conductor wherein the third conductor and the fourth conductor are substantially coplanar and are not electrically connected together.
8 more elements
A method of forming an MOS transistor comprising:
- providing a semiconductor substrate;
- forming the MOS transistor on the semiconductor substrate including forming the MOS transistor with an active region and a termination region that is external to the active region;
- forming an active trench in the active region;
- forming a first trench and a second trench within the termination region;
- forming a first conductor within the termination region and overlying the first trench wherein the first conductor is electrically connected to a second conductor within the first trench;
- and
- forming the second conductor to electrically contact a third conductor that is within the active trench.
4 more elements
A method of forming a transistor comprising:
- providing a semiconductor substrate having a surface;
- forming a plurality first trenches in an active region of the transistor;
- forming a second trench and a third trench extending into the semiconductor substrate including forming the second trench and the third trench in a termination region of the transistor that is not in the active region of the transistor;
- forming a first conductor within the second trench;
- forming a second conductor within the third trench;
- and
- forming a third conductor overlying the surface of the semiconductor substrate and overlying the second trench and electrically contacting the first conductor.
4 more elements
Dependencies are inferred from the claim text.