Method for forming gate spacers for semiconductor devices
AssigneeTokyo Electron Limited
InventorRobert D. Clark
Life of this patent
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Abstract
A method for forming gate spacers for semiconductor devices includes forming a patterned gate structure on substrate, where the patterned gate structure contains an interface layer on the substrate, a high-k film on the interface layer, and a gate electrode on the high-k film. The method further includes depositing a nitride barrier layer on the patterned gate structure using processing conditions that minimize or prevent oxidation of the substrate and the gate electrode, depositing a spacer material on the nitride barrier layer, and anisotropically etching the spacer material to form a gate spacer on the patterned gate structure.
Claims20
A method for forming a semiconductor device, the method comprising:
- forming a patterned gate structure on a substrate, the patterned gate structure comprising an interface layer on the substrate, a high-k film on the interface layer, and a gate electrode on the high-k film;
- depositing a nitride barrier layer on the patterned gate structure in a process chamber, the depositing comprising:
- exposing the patterned gate structure to a process gas containing a nitride precursor at a substrate temperature below 400° C., and
- maintaining a partial pressure of oxygen-containing gases below 1×10−4 Torr in the process chamber during the exposing;
- depositing a spacer material on the nitride barrier layer;
- and
- anisotropically etching the spacer material to form a gate spacer on the patterned gate structure.
A method for forming a semiconductor device, the method comprising:
- forming a patterned gate structure on a substrate, the patterned gate structure comprising an interface layer on the substrate, a high-k film on the interface layer, a metal-containing gate electrode directly contacting the high-k film;
- depositing a nitride barrier layer containing SiN or SiCN on the patterned gate structure in a process chamber, the depositing comprising:
- exposing the patterned gate structure to a process gas containing a SiN or SiCN precursor at a substrate temperature below 400° C., and
- maintaining a partial pressure of oxygen-containing gases below 1×10−4 Torr in the process chamber during the exposing;
- depositing a SiO2 spacer material on the nitride barrier layer;
- and
- anisotropically etching the SiO2 spacer material to form a gate spacer on the patterned gate structure.
A method for forming a semiconductor device, the method comprising:
- forming a patterned gate structure on a substrate, the patterned gate structure comprising an interface layer on the substrate, a high-k film on the interface layer, and a metal-containing gate electrode directly contacting the high-k film;
- depositing a nitride barrier layer containing SiN or SiCN by ALD or PEALD on the patterned gate structure in a process chamber, wherein a thickness of the nitride barrier layer on sidewalls of the patterned gate structure is between about 10 angstrom and about 50 angstrom, the depositing comprising:
- exposing the patterned gate structure to a process gas containing a SiN or SiCN precursor at a substrate temperature below 400° C., and
- maintaining a partial pressure of oxygen-containing gases below 1×10−4 Torr in the process chamber during the exposing;
- depositing a SiN or SiCN spacer material on the nitride barrier layer;
- and
- anisotropically etching the spacer material to form a gate spacer on the patterned gate structure.
Dependencies are inferred from the claim text.