US 2010/0060767 A1Published application

Analog-signal processing circuit for improving accuracy of arithmetic mean of signals

AssigneeKabushiki Kaisha Toshiba

InventorRyuta OKAMOTO

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Abstract

In a first signal conversion circuit, a first electrode of a first capacitor is connected to a first signal line, and a second electrode thereof is connected to a first node. In a second capacitor, a third electrode thereof is connected to a second signal line, and a fourth electrode thereof is connected to a second node. In a first inverting amplifier including a first negative feedback switch, a first input electrode is connected to the first node, and a first output electrode is connected to a third node. In a second inverting amplifier including a second negative feedback switch, a second input electrode is connected to the second node. A first averaging switch is connected between a first node and second node. A second averaging switch is connected between third node and fourth node.

Claims20

Dependent claims

An analog signal processing circuit comprising:

a first signal line;
a second signal line;
and
a first signal conversion circuit connected to the first and second signal lines, wherein the first signal conversion circuit comprises
a first capacitor a first electrode of which is connected to the first signal line, and a second electrode of which is connected to a first node;
a second capacitor a third electrode of which is connected to the second signal line, and a fourth electrode of which is connected to a second node;
a first inverting amplifier a first input electrode of which is connected to the first node, a first output electrode of which is connected to a third node, and which includes a first negative feedback switch;
a second inverting amplifier a second input electrode of which is connected to the second node, a second output electrode of which is connected to a fourth node, and which includes a second negative feedback switch;
a first averaging switch configured to connect between the first node and second node;
and
a second averaging switch configured to connect between the third node and fourth node.

8 more elements

A solid-state image pickup device comprising:

first and second photoelectric conversion sections for converting light into an electric signal;
a first signal line configured to receive an electric signal from the first photoelectric conversion section;
a second signal line configured to receive an electric signal from the second photoelectric conversion section;
and
a signal conversion circuit connected to the first and second signal lines, wherein
the signal conversion circuit comprises
a first capacitor a first electrode of which is connected to the first signal line, and a second electrode of which is connected to a first node;
a second capacitor a third electrode of which is connected to the second signal line, and a fourth electrode of which is connected to a second node;
a first inverting amplifier a first input electrode of which is connected to the first node, a first output electrode of which is connected to a third node, and which includes a first negative feedback switch;
a second inverting amplifier a second input electrode of which is connected to the second node, a second output electrode of which is connected to a fourth node, and which includes a second negative feedback switch;
a first averaging switch configured to connect between the first node and second node;
and
a second averaging switch configured to connect between the third node and fourth node.

10 more elements

A solid-state image pickup device comprising:

first, second, third, and fourth photoelectric conversion sections for converting light into an electric signal;
a first signal line configured to convert an electric signal from the first photoelectric conversion section;
a second signal line configured to receive an electric signal from the second photoelectric conversion section;
a third signal line configured to receive an electric signal from the third photoelectric conversion section;
a fourth signal line for receiving an electric signal from the fourth photoelectric conversion section;
a first switch arranged at one ends of the first signal line and second signal line, the first switch connecting one of the first and second signal lines to a fifth signal line;
a second switch arranged at one ends of the third signal line and fourth signal line, the second switch connecting one of the third and fourth signal lines to a sixth signal line;
a third switch arranged at the other ends of the first signal line and second signal line, the third switch connecting the other one of the first and second signal lines to a seventh signal line;
a fourth switch arranged at the other ends of the third signal line and fourth signal line, the fourth switch connecting the other one of the third and fourth signal lines to an eighth signal line;
a first signal conversion circuit connected to a first node connected to the fifth signal line, and a second node connected to the sixth signal line;
and
a second signal conversion circuit connected to a first node connected to the seventh signal line, and a second node connected to the eighth signal line, wherein
each of the first and second signal conversion circuits comprises
a first capacitor a first electrode of which is connected to the first node, and a second electrode of which is connected to a third node;
a second capacitor a third electrode of which is connected to the second node, and a fourth electrode of which is connected to a fourth node;
a first inverting amplifier a first input electrode of which is connected to the third node, a first output electrode of which is connected to a fifth node, and which includes a first negative feedback switch;
a second inverting amplifier a second input electrode of which is connected to the fourth node, a second output electrode of which is connected to a sixth node, and which includes a second negative feedback switch;
a first averaging switch configured to connect between the third node and fourth node;
and
a second averaging switch configured to connect between the fifth node and sixth node.

17 more elements

Dependencies are inferred from the claim text.