US 2010/0060344 A1 · TRANSITIONING DIGITAL INTEGRATED CIRCUIT FROM STANDBY MODE TO ACTIVE MODE VIA BACKGATE CHARGE TRANSFER

Abstract

Circuits and methods are provided for facilitating transitioning of a digital circuit from backgate biased standby mode to active mode. The digital circuit includes a semiconductor substrate, multiple n-channel transistors disposed at least partially in one or more p-type wells in the semiconductor substrate, multiple p-channel transistors disposed at least partially in one or more n-type wells in the semiconductor substrate, and a backgate control circuit. The backgate control circuit is electrically coupled to the p-type well(s) and to the n-type well(s) to facilitate transitioning of the multiple n-channel transistors and the multiple p-channel transistors from backgate biased standby mode to active mode by automatically shunting charge from the n-type well(s) to the p-type well(s) until a well voltage threshold is reached indicative of a completed transition of the transistors from backgate biased standby mode to active mode.

Claims20

Dependent claims

A digital circuit comprising:

a semiconductor substrate;
at least one n-channel transistor having a gate, a drain and a source disposed at least partially in at least one p-type well in the semiconductor substrate;
at least one p-channel transistor having a gate, a drain and a source disposed at least partially in at least one n-type well in the semiconductor substrate;
and
a backgate control circuit electrically coupled to the at least one p-type well and to the at least one n-type well to facilitate transitioning the at least one n-channel transistor and the at least one p-channel transistor from standby mode to active mode by shunting charge from the at least one n-type well to the at least one p-type well.

2 more elements

A method of transitioning transistors of a digital circuit from backgate biased standby mode to active mode, the method comprising:

shunting charge from at least one n-type well to at least one p-type well in a semiconductor substrate of the digital circuit, the digital circuit comprising at least one p-channel transistor having a gate, a drain and a source disposed at least partially within the at least one n-type well, and at least one n-channel transistor having a gate, a drain and a source disposed at least partially within the at least one p-type well;
monitoring a well voltage of at least one well of the at least one n-type well and the at least one p-type well;
and
discontinuing shunting of charge from the at least one n-type well to the at least one p-type well when the monitored well voltage reaches a defined threshold voltage indicative of a transition of the at least one p-channel transistor or the at least one n-channel transistor to active mode.

1 more element

A method of fabricating a digital circuit comprising:

obtaining a semiconductor substrate;
disposing at least one p-type well in the semiconductor substrate and disposing at least one n-type well in the semiconductor substrate;
providing at least one n-channel transistor having a gate, a drain and a source disposed at least partially in the at least one p-type well, and providing at least one p-channel transistor having a gate, a drain and a source disposed at least partially in the at least one n-type well;
and
providing a backgate control circuit electrically coupled to the at least one p-type well and to the at least one n-type well to facilitate transitioning of the at least one n-channel transistor and the at least one p-channel transistor from a standby mode to an active mode by shunting charge from the at least one n-type well to the at least one p-type well.

2 more elements

Dependencies are inferred from the claim text.

Transitioning digital integrated circuit from standby mode to active mode via backgate charge transfer

Life of this patent

Transitioning digital integrated circuit from standby mode to active mode via backgate charge transfer

Life of this patent

Abstract

Claims20