Semiconductor device
AssigneeHynix Semiconductor Inc.
InventorJung-Hoon PARK
Life of this patent
Estimating the term…
Abstract
A semiconductor device includes: a clock input unit configured to receive a system clock and a data clock externally; a phase dividing unit configured to generate a plurality of multi-system clocks in response to the system clock, wherein each of the multi-system clocks has an individual phase difference; a phase detecting unit configured to detect phase differences between the plurality of multi-system clock and the data clock and to generating generate a training information signal in response to the detection result; and a signal transmitting unit configured to transmit the training information signal.
Claims24
A semiconductor device, comprising:
- a clock input unit configured to receive a system clock and a data clock externally;
- a phase dividing unit configured to generate a plurality of multi-system clocks in response to the system clock, wherein each of the multi-system clocks has an individual phase difference;
- a phase detecting unit configured to detect phase differences between one of the plurality of multi-system clocks and the data clock to generate a training information signal in response to the detection result;
- and
- a signal transmitting unit configured to transmit the training information signal.
A semiconductor device, comprising:
- a clock input unit configured to receive a system clock and a data clock externally;
- a phase dividing unit configured to generate a plurality of multi-system clocks each having an individual phase difference based on the system clock;
- a clock dividing unit configured to generate a data dividing clock with the same frequency as the plurality of multi-system clocks by dividing a frequency of the data clock;
- a phase detecting unit configured to detect phase differences between the plurality of multi-system clock and the data dividing clock to generate a training information signal in response to the detection result;
- and
- a signal transmitting unit configured to transmit the training information signal.
A semiconductor device, comprising:
- a clock input unit configured to receive a system clock and a data clock from outside;
- a first clock dividing unit configured to divide a frequency of the system clock by a first ratio to output a system dividing clock;
- a phase dividing unit configured to generate a plurality of multi-system dividing clocks having a phase difference of a dedicated size respectively in response to the system dividing clock;
- a second clock dividing unit configured to divide a frequency of the data clock by a second ratio to generate a data dividing clock;
- a phase detecting unit configured to detect phase differences between the plurality of multi-system dividing clocks and the data dividing clock respectively to generate a training information signal in response to the detection result;
- and
- a signal transmitting unit configured to transmit the training information signal.
Dependencies are inferred from the claim text.