Lateral oxidation with high-k dielectric liner
AssigneeKabushiki Kaisha Toshiba
InventorsTakeshi Watanabe, Ryosuke Iijima
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Abstract
Disclosed are methods of making and using a high-K dielectric liner to facilitate the lateral oxidation of a high-K gate dielectric, integrated circuit structures containing the high-K dielectric liner and/or oxidized high-K gate dielectric, and other associated methods.
Claims20
A method of oxidizing a high-K gate dielectric in an integrated circuit structure, comprising:
- forming a high-K dielectric liner over a FET, the FET comprising a metal gate and the high-K gate dielectric, the high-K dielectric liner in contact with the high-K gate dielectric to allow oxygen from the high-K dielectric liner to oxidize the high-K gate dielectric.
The method of claim 7, before removing the high-K dielectric liner, keeping the high-K dielectric liner in contact with the high-K gate dielectric for a time from about 10 seconds to about 5 minutes.
A method of reducing Vth of a pFET comprising a high-K gate dielectric, comprising:
- forming a high-K dielectric liner over the pFET, the pFET comprising a metal gate and the high-K gate dielectric, the high-K dielectric liner in contact with the high-K gate dielectric to allow oxygen from the high-K dielectric liner to oxidize the high-K gate dielectric.
A CMOS integrated circuit, comprising:
- nFETs in an p-type portion of a substrate;
- pFETs in a n-type portion of the substrate;
- at least one of the pFETs comprising a metal gate positioned above a high-K gate dielectric;
- and
- a high-K dielectric liner covering at least one pFET and in direct contact with the high-K gate dielectric.
Dependencies are inferred from the claim text.