Tool for charge trapping memory using simulated programming operations
AssigneeMacronix International Co., Ltd.
InventorsShaw Hung Ku, Chia-Wei Wu, Ming Shang Chen, Wenpin Lu
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AssigneeMacronix International Co., Ltd.
InventorsShaw Hung Ku, Chia-Wei Wu, Ming Shang Chen, Wenpin Lu
Estimating the term…
A method for simulating operation of a charge trapping memory cell which computes the amount of charge trapped by determining first tunneling current through the tunneling layer, determining second tunneling current out of the charge trapping layer to the gate, determining third tunneling current escaping from traps in the charge trapping layer and tunneling out to the gate, and integrating said tunneling currents over a time interval. A change in threshold voltage can be computed for a transistor including the charge trapping structure. The parameter set can include only physical parameters, including layer thickness, band offsets and dielectric constants.
A computer implemented method for simulation of charge trapping in a charge trapping structure having a tunneling layer, a charge trapping layer and blocking layer;
An automated design tool which simulates charge trapping in a charge trapping structure having a tunneling layer, a charge trapping layer and blocking layer;
An article of manufacture comprising:
Dependencies are inferred from the claim text.