External Memory Controller Node
AssigneeQST Holdings, LLC
InventorsFrederick Curtis Furtek, Paul L. Master
Life of this patent
Estimating the term…
Abstract
A memory controller to provide memory access services in an adaptive computing engine is provided. The controller comprises: a network interface configured to receive a memory request from a programmable network; and a memory interface configured to access a memory to fulfill the memory request from the programmable network, wherein the memory interface receives and provides data for the memory request to the network interface, the network interface configured to send data to and receive data from the programmable network.
Claims47
1-32. (canceled)
A computing machine embodied in an integrated circuit comprising:
- a memory;
- a plurality of heterogeneous computational nodes configured to make memory requests for accesses to the memory;
- and
- a memory controller including a predefined number of memory channels, the memory controller configured to receive memory requests assigned to corresponding memory channels of the predefined number of memory channels and to allow accesses by the heterogeneous computational nodes to the memory in response to the memory requests.
A computing machine embodied in an integrated circuit, the computing machine in communication with an external memory device, the integrated circuit comprising:
- a plurality of heterogeneous computational nodes configured to make memory requests for data transfer to the external memory device;
- and
- a controller including a predefined number of channels, the controller configured to receive requests for data-transfer, the requests assigned to corresponding channels of the predefined number of channels and to allow accesses by the heterogeneous computational nodes to the external memory device in response to the memory requests.
An adaptive computing machine embodied in an integrated circuit, the adaptive computing machine comprising:
- a memory;
- a plurality of heterogeneous computational nodes configured to make memory requests for accesses to the memory;
- a memory controller including a predefined number of memory channels and is configured to receive memory requests assigned to corresponding memory channels of the predefined number of memory channels and is configured to allow accesses by the heterogeneous computational nodes to the memory in response to the memory requests;
- and
- a programmable interconnection network providing programmable interconnections among the heterogeneous computational nodes and the memory controller.
An adaptive computing machine embodied in an integrated circuit and in communication with an external memory device, the adaptive computing machine comprising:
- a plurality of heterogeneous computational nodes configured to make memory requests for data transfer to the external memory device;
- a controller including a predefined number of channels and configured to receive requests for data-transfer, the requests assigned to corresponding channels of the predefined number of channels and configured to allow accesses by the heterogeneous computational nodes to the external memory device in response to the memory requests;
- and
- a programmable interconnection network to provide programmable interconnections among the heterogeneous computational nodes and the controller.
Dependencies are inferred from the claim text.