Cache coherency protocol in a data processing system

A method of operating a data processing system, the method comprising:

• detecting a bus transaction on a system interconnect of a data processing system by a cache coherency manager, the data processing system including at least two masters coupled to the system interconnect;
• determining by the cache coherency manager whether the bus transaction is one of a first type of bus transaction or a second type of bus transaction, wherein the determining whether the bus transaction is one of a first type of bus transaction or a second type of bus transaction is based upon a burst attribute of the bus transaction and whether the bus transaction is a read transaction or a write transaction;
• performing a cache coherency operation for the bus transaction in response to the determining that the bus transaction is of the first type, wherein the performing the cache coherency operation includes the cache coherency manager requesting at least one cache of the data processing system to perform a search to determine whether the at least one cache contains data associated with a memory address of the bus transaction;
• not performing cache coherency operations for the bus transaction in response to the determining that the bus transaction is of the second type, wherein the not performing cache coherency operations includes the cache coherency manager not requesting any cache of the data processing system to search to determine whether a cache contains data associated with the memory address of the bus transaction.

A method of operating a data processing system, the method comprising:

• detecting a bus transaction on a system interconnect of a data processing system, the data processing system including at least two masters;
• determining whether the bus transaction is one of a first type of bus transaction or a second type of bus transaction, wherein the determining whether the bus transaction is one of the first type of bus transaction or the second type of bus transaction is based upon a burst attribute of the bus transaction and whether the bus transaction is a read transaction or a write transaction, wherein read transactions are the second type of bus transactions, wherein multiple beat bus transactions generated by processor masters of the data processing system are the second type of bus transaction, wherein at least some single beat write transactions generated by the processor masters are the first type of bus transaction;
• performing a cache coherency operation for the bus transaction in response to the determining that the bus transaction is of the first type, wherein the performing the cache coherency operation includes searching the at least one cache of the data processing system to determine whether the at least one cache contains data associated with a memory address the bus transaction;
• not performing cache coherency operations for the bus transaction in response to the determining that the bus transaction is of the second type.