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US 2009/0275147 A1Published application
Mitigation of edge degradation in ferroelectric memory devices through plasma etch clean
AssigneeTexas Instruments Incorporated
InventorsKezhakkedath R. UDAYAKUMAR, Lindsey H. HALL, Francis G. CELII, Scott R. SUMMERFELT
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Abstract
A ferroelectric memory device is fabricated while mitigating edge degradation. A bottom electrode is formed over one or more semiconductor layers. A ferroelectric layer is formed over the bottom electrode. A top electrode is formed over the ferroelectric layer. The top electrode, the ferroelectric layer, and the bottom electrode are patterned or etched. A dry clean is performed that mitigates edge degradation. A wet etch/clean is then performed.
Claims6
A method of fabricating a ferroelectric memory device, the method comprising:
- forming a bottom electrode diffusion barrier layer over one or more semiconductor layers;
- forming a bottom electrode over the bottom electrode diffusion barrier layer;
- forming a ferroelectric layer over the bottom electrode;
- forming a top electrode over the ferroelectric layer;
- forming a hard mask on the top electrode covering a target portion of the top electrode;
- selectively etching the top electrode via the hard mask;
- selectively etching the ferroelectric layer via the hard mask;
- selectively etching the bottom electrode via the hard mask;
- selectively etching the bottom electrode diffusion barrier layer via the hard mask;
- and
- maintaining a selected separation voltage by performing a dry clean process subsequent to etching the bottom electrode diffusion barrier layer with a plasma that generates isotropic fluoride species.
8 more elements
Dependencies are inferred from the claim text.