Systems and Methods for Writing to a Memory
AssigneeQimonda AG
InventorsLuca De Ambroggi, Jens Egerer, Peter Schroegmeier
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AssigneeQimonda AG
InventorsLuca De Ambroggi, Jens Egerer, Peter Schroegmeier
Estimating the term…
An integrated circuit includes memory segments, each having at least one memory cell configurable in first and second states to store data, and a controller that controls programming and erasing of the memory segments. The controller maps external memory addresses of write data to internal memory addresses of erased memory segments with no memory cells in the first state such that erased memory segments are programmed with write data. When a write access occurs for an external memory address previously mapped to an internal memory address of a programmed memory segment with at least one memory cell in the first state, the controller remaps the external memory address to another internal memory address of an erased memory segment. The controller identifies programmed memory segments to be erased and controls selective erasure of the identified programmed memory segments, such as programmed memory segments no longer mapped to an external memory address.
An integrated circuit, comprising:
A resistive random access memory device, comprising:
A system, comprising:
A method of writing data to a memory device with a memory cell array comprising memory segments, wherein a memory segment that includes no memory cells in a first state is erased, and a memory segment that includes at least one memory cell in the first state is programmed, the method comprising:
The method of 18, wherein the storage element controllable to be set in a low resistance state and reset in a high resistance state, and wherein programming a memory segment includes resetting the storage element of at least one memory cell of the memory segment to the high resistance state.
A method of manufacturing a memory device, the method comprising:
Dependencies are inferred from the claim text.