Ferroelectric memory device and operating method for the same
AssigneeRohm Co., Ltd.
InventorsHiromitsu Kimura, Takaaki Fuchikami, Yoshikazu Fujimori
Life of this patent
Estimating the term…
Abstract
A ferroelectric memory device includes: a plurality of memory banks configured to include a memory cell array composed of a ferroelectric memory; a cache bank configured to be bus-connected with the memory banks, and for copying data stored in the memory banks; and a memory bank/cache control sequencer for accessing and refreshing to the memory banks and the cache bank, wherein a random access control to the ferroelectric memory is possible during each memory cycle without delay of refresh operation.
Claims17
A ferroelectric memory device comprising:
- a plurality of memory banks configured to include a memory cell array composed of a ferroelectric memory;
- a cache bank configured to be bus-connected with the memory banks, and for copying data stored in the memory banks;
- and
- a memory bank/cache control sequencer for accessing and refreshing to the memory banks and the cache bank, wherein
- a random access control to the ferroelectric memory is possible during each memory cycle without delay of refresh operation.
An operating method for a ferroelectric memory device comprising:
- copying beforehand data currently held at one of a memory cell for refresh and a memory block to a cache bank when refreshing;
- using the data stored in the cache bank and continuing the refresh processing when an external access request is sent to the memory block in the refresh processing;
- and
- writing back the data stored in the cache bank to the memory block after completing of the refresh, and wherein
- the ferroelectric memory device comprises:
- a plurality of memory banks configured to include a memory cell array composed of a ferroelectric memory;
- the cache bank configured to be bus-connected with the memory banks, and for copying data stored in the memory banks;
- and a memory bank/cache control sequencer for accessing and refreshing to the memory banks and the cache bank.
An operating method for a ferroelectric memory device comprising:
- determining whether a cache memory has target data when the ferroelectric memory device is accessed;
- accessing the cache memory when the cache memory has target data and when being a cache hit;
- accessing a target memory bank in the case of read-out when the cache memory has target data and when being a cache miss;
- and
- writing back the data stored in the cache memory to an original memory bank in the case of write-in when the cache memory has target data and when being a cache miss, and wherein
- the ferroelectric memory device comprises:
- a plurality of memory banks configured to include a memory cell array composed of a ferroelectric memory;
- the cache bank configured to be bus-connected with the memory banks, and for copying data stored in the memory banks;
- a memory bank/cache control sequencer for accessing and refreshing to the memory banks and the cache bank;
- and a cache memory configured to include a determination circuit for determining whether there is any target data when accessed.
Dependencies are inferred from the claim text.