Synchronous Rectifier Control Circuit and Method

A method for detecting a primary switch turn on in a voltage converter secondary circuit, comprising:

• coupling the drain to source path of an SR transistor between a secondary coil of a transformer and a first voltage output terminal;
• coupling a second voltage output terminal to the secondary coil;
• coupling an output capacitor across the first and second output terminals;
• generating a first pulse signal to a sample and hold circuit coupled to the drain to source voltage of the SR transistor and outputting a reference voltage;
• comparing the reference voltage to the drain to source voltage of the SR transistor;
• and
• outputting a primary turn on detected signal when the drain to source voltage of the SR transistor exceeds the reference voltage.

A circuit for controlling a synchronous (SR) transistor, comprising:

• a voltage monitoring circuit coupled to monitor a drain to source voltage of the SR transistor and to output a signal indicating a transition;
• a first set reset circuit having a set input coupled to the voltage monitoring circuit;
• a one-pulse generator coupled to an output of the first set reset circuit;
• a second set reset circuit having a set input coupled to the one pulse generator and having an output;
• and
• an output for controlling the gate of the SR transistor coupled to the output of the second set reset circuit.

A circuit for controlling an SR MOSFET, comprising:

• means for determining when the drain to source voltage of the SR MOSFET transitions below a predetermined threshold and outputting a threshold detected signal;
• means for setting a first set reset flag responsive to the threshold detected signal;
• means for generating a pulse responsive to the first set reset flag;
• means for setting a second set reset flag and outputting a gate control signal responsive to the pulse;
• means for resetting the second set reset flag;
• and
• means for inhibiting the means for generating a pulse until a primary turn on detected signal is received.

A synchronous rectifier (SR), comprising:

• an SR transistor having its drain to source path coupled between a secondary coil of a transformer and a first voltage output terminal, and having a gate control terminal;
• a second voltage output terminal coupled to the secondary coil of the transformer;
• an output capacitor coupled between the first and second voltage output terminals;
• and
• an SR control circuit having an output coupled to the gate control terminal, comprising:
• a voltage monitoring circuit coupled to monitor the drain to source voltage of the SR transistor and to output a signal indicating a transition;
• a first set reset circuit having a set input coupled to the voltage monitoring circuit;
• a one-pulse generator coupled to the output of the first set reset circuit;
• a second set reset circuit having a set input coupled to the one pulse generator and having an output;
• and
• an output for controlling the gate of the SR transistor coupled to the output of the second set reset circuit.