Flexible adder circuits with fast carry chain circuitry

A configurable adder circuit in a logic region on a programmable integrated circuit, comprising:

• nonvolatile memory and logic that produces a static redundancy control signal that has a value that depends on whether the programmable integrated circuit contains defective circuitry;
• a first adder in a first portion of the logic region;
• a second adder in a second portion of the logic region;
• and
• at least one multiplexer that provides an adder carry output signal for the logic region when the first and second adders are combined, wherein the multiplexer comprises control inputs that receive the static redundancy control signal and at least one other control signal.

A programmable logic device integrated circuit comprising:

• a plurality of rows of logic regions;
• nonvolatile memory and logic circuitry that produces at least one redundancy control signal that has first logic value when the programmable logic device integrated circuit contains no defective circuitry and that has a second logic value when the programmable logic device integrated circuit contains defective circuitry, wherein the second logic value is different than the first logic value;
• and
• first and second adders and at least one multiplexer in each logic region, wherein the multiplexer in each logic region has a first input that receives carry signals from the first adder, a second input that receives carry signals from the second adder, and at least one control input that receives the static redundancy control signal.