Semiconductor device and method for manufacturing the same

A semiconductor device comprising:

• a semiconductor substrate;
• a first well diffusion layer of a first conductivity type formed in an upper portion of the semiconductor substrate;
• a second well diffusion layer of the first conductivity type formed in an upper portion of the first well diffusion layer;
• a source diffusion layer of a second conductivity type formed in an upper portion of the second well diffusion layer;
• a third well diffusion layer of the second conductivity type formed in an upper portion of the semiconductor substrate to be positioned away from the second well diffusion layer, and forms a PN junction with the first well diffusion layer;
• a drain diffusion layer of the second conductivity type formed in an upper portion of the third well diffusion layer;
• a gate insulating film formed on the second well diffusion layer, the first well diffusion layer, and the third well diffusion layer;
• a gate electrode formed on the gate insulating film;
• a device isolation insulating film formed on the third well diffusion layer and between the gate insulating film and the drain diffusion layer to be connected to the gate insulating film;
• and
• a buried diffusion layer of the first conductivity type formed in part of the semiconductor substrate in contact with the bottoms of the first well diffusion layer and the third well diffusion layer.

A method for manufacturing a semiconductor device comprising:

• (a) forming a first well diffusion layer by selectively implanting impurity ions of a first conductivity type into a first region of a semiconductor substrate on which a device isolation insulating film has been formed;
• (b) forming a second well diffusion layer by selectively implanting impurity ions of the first conductivity type into at least an upper portion of the first well diffusion layer,
• (c) forming a third well diffusion layer in part of the semiconductor substrate away from the first well diffusion layer by selectively implanting impurity ions of a second conductivity type into a second region of the semiconductor substrate different from the first region;
• (d) forming a buffer layer of the second conductivity type in part of the semiconductor substrate between the first well diffusion layer and the third well diffusion layer to extend from a surface portion of the semiconductor substrate to a position deeper than a peak of curvature of impurity concentration distribution of the third well diffusion layer;
• (e) forming a gate insulating film and a gate electrode sequentially on the second well diffusion layer and the third well diffusion layer by implanting impurity ions of the second conductivity type;
• and
• (f) forming a source diffusion layer in an upper portion of the second well diffusion layer and forming a drain diffusion layer in an upper portion of the third well diffusion layer by implanting impurity ions of the second conductivity type into upper portions of the second well diffusion layer and the third well diffusion layer.