Phase change memory device having heaters and method for manufacturing the same

A phase change memory device comprising:

• switching elements formed on a semiconductor substrate;
• heat sinks formed on the switching elements;
• heaters formed on the heat sinks;
• and
• a phase change layer formed on the heaters.

A method for manufacturing a phase change memory device, comprising the steps of:

• forming switching elements on a semiconductor substrate;
• forming heat sinks on the switching elements;
• forming heaters on the heat sinks;
• and
• forming a phase change layer on the heaters.

A method for manufacturing a phase change memory device, comprising the steps of:

• providing a semiconductor having a cell region and a peripheral region;
• forming an interlayer dielectric having contact holes on the cell region of the semiconductor substrate;
• forming a first conductivity type polysilicon layer on the semiconductor substrate including the interlayer dielectric, such that the contact holes are filled with the first conductivity type polysilicon layer;
• ion-implanting second conductivity type impurities into an upper portion of the first conductivity type polysilicon layer formed within the contact holes in the cell region so as to form vertical PN diodes;
• forming a conductive layer on the semiconductor substrate including the cell region in which the vertical PN diodes are formed;
• etching both the conductive layer and the first conductivity type polysilicon layer so as to form heat sinks on the vertical PN diodes in the cell region and form gates on the semiconductor substrate in the peripheral region;
• forming heaters on the heat sinks in the cell region;
• and
• forming a phase change layer on the heaters.

A method for manufacturing a phase change memory device, comprising the steps of:

• providing a semiconductor having a cell region and a peripheral region;
• forming an interlayer dielectric having contact holes on the cell region of the semiconductor substrate, such that the contact holes expose portions of the cell region;
• forming a first conductivity type epi-silicon layer in the contact holes in the cell region;
• removing a portion of the interlayer dielectric formed in the peripheral region;
• forming a polysilicon layer in the peripheral region from which the portion of the interlayer dielectric is removed;
• ion-implanting second conductivity type impurities into an upper portion of the first conductivity type epi-silicon layer formed in the contact holes in the cell region so as to form vertical PN diodes;
• forming a conductive layer on the semiconductor substrate including the cell region in which the vertical PN diodes are formed;
• etching both the conductive layer and the polysilicon layer so as to form heat sinks on the vertical PN diodes in the cell region and form gates on the semiconductor substrate in the peripheral region;
• forming heaters on the heat sinks in the cell region;
• and
• forming a phase change layer on the heaters.