Information processing apparatus and error correction method
AssigneeKabushiki Kaisha Toshiba
InventorKenji YOSHIDA
Life of this patent
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Abstract
According to one embodiment, a memory interface module is configured to read one of instructions stored in a memory in accordance with a memory address designated by a fetch request issued from a processor. An error detection module is configured to detect an error in the read instruction. An instruction transmission module is configured to send to the processor, upon detection of an error in the read instruction, a first instruction to hold on a stack the same memory address as the one designated by the fetch request and a second instruction to jump to an error correction routine for correcting an error of the read instruction.
Claims12
An information processing apparatus comprising:
- a memory interface module configured to read an instruction stored in a memory in accordance with a memory address designated by a fetch request from a processor;
- an error detection module configured to detect an error in the read instruction;
- and
- an instruction transmitter configured to send to the processor a first instruction to store the memory address designated by the fetch request into a stack and a second instruction to jump to an error correction module for correcting an error of the read instruction upon detection of the error in the read instruction.
An information processing system comprising:
- a processor;
- a memory configured to store instructions and error correction codes corresponding to the instructions;
- a memory interface module configured to read one of the instructions stored in the memory in accordance with a memory address designated by a fetch request from the processor;
- an error detection module configured to detect an error in the read instruction with the error correction code corresponding to the read instruction;
- and
- an instruction transmitter configured to send to the processor a first instruction to store the memory address designated by the fetch request into a stack and a second instruction to jump to an error correction module for correcting an error of the read instruction instead of sending the read instruction upon detection of the error in the read instruction, wherein the memory address stored in the stack is loaded on a program counter of the processor after completion of an error correction by the error correction module.
An error correction method comprising:
- reading an instruction stored in a memory in accordance with a memory address designated by a fetch request from a processor;
- detecting whether an error exists in the read instruction;
- sending to the processor a first instruction to store the memory address designated by the fetch request into a stack and a second instruction to jump to an error correction module for correcting an error of the read instruction upon detection of the error in the read instruction;
- and
- loading the memory address in the stack on a program counter of the processor after completion of an error correction by the error correction module.
Dependencies are inferred from the claim text.