Non-volatile semiconductor memory device and method of writing data in non-volatile semiconductor memory devices
AssigneeKabushiki Kaisha Toshiba
InventorKoji HOSONO
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AssigneeKabushiki Kaisha Toshiba
InventorKoji HOSONO
Estimating the term…
The device has a data write mode to boost a first boost channel region that contains a non-write selected memory cell and non-selected memory cells located closer to the first selection gate transistor, and a second boost channel region that contains non-selected memory cells located closer to the second selection gate transistor than the selected memory cell, both electrically separated from each other. In this mode, a write non-selection voltage applied to a non-selected memory cell next to the second selection gate transistor is switched, at least in two stages, between a lower voltage V1 than a write non-selection voltage Vm applied to other non-selected memory cells in the NAND cell unit and a higher voltage V2 than the lower voltage (V1<V2≦Vm).
A non-volatile semiconductor memory device, comprising a NAND cell unit including a plurality of electrically rewritable non-volatile memory cells serially connected, the NAND cell unit having one end connected to a bit line via a first selection gate transistor and the other end connected to a source line via a second selection gate transistor,
Dependencies are inferred from the claim text.