Programmable memory repair scheme

A method for operating a memory device including primary and redundant data storage elements and a repair circuit with one or more address matching registers, the method comprising:

• storing a repair address in a non-volatile memory, the repair address indicating one or more malfunctioning primary data storage elements;
• providing operational power for the memory device;
• entering into a memory setup mode to prepare the powered memory device for subsequent memory access operations;
• in the memory setup mode, programming the address matching registers based on the stored repair address;
• and
• exiting the memory setup mode to allow the memory device to perform the memory access operations during which the address matching registers are configured to recognize the repair address and the repair circuit is configured to reroute the memory access operations from the primary data storage elements to corresponding ones of the redundant data storage elements if the repair address is recognized.

A method for testing a semiconductor memory device assembled in a single package with a memory controller that is configured to control the memory device for memory access operations, the memory device including primary and redundant data storage elements and a repair circuit with one or more address matching registers, the method comprising:

• testing the memory device in the package, the test identifying one or more malfunctioning primary data storage elements;
• storing a repair address corresponding to the malfunctioning primary data storage elements in a non-volatile memory of the memory controller;
• and
• providing a repair unit in the memory controller, the repair unit configured to program the address matching registers of the memory device based on the stored address information in preparation for the memory access operations, wherein the programmed address matching registers are configured to recognize the repair address based on which the repair circuit reroutes the memory access operations from the malfunctioning primary data storage elements to corresponding ones of the redundant data storage elements.

A method for operating a system that includes a first integrated circuit device and a second integrated circuit device operably connected to the first integrated circuit device, the second integrated circuit device including a memory device having primary and redundant data storage elements, the method comprising:

• testing the memory device to identify one or more malfunctioning primary data storage elements;
• storing at least one repair address corresponding to the malfunctioning primary data storage elements in a non-volatile memory of the first integrated circuit device;
• and
• enabling a memory setup function in the first integrated circuit device to program a memory repair circuit in the second integrated circuit device based on the stored repair address in preparation for memory access operations, wherein the programmed memory repair circuit is configured to reroute the memory access operations from the malfunctioning primary data storage elements to corresponding ones of the redundant data storage elements.