Metal oxide semiconductor transistor with reduced gate height, and related fabrication methods

A method of fabricating a semiconductor device, the method comprising:

• providing a silicon-on-insulator (SOI) substrate comprising a buried oxide layer and a layer of silicon material on the buried oxide layer;
• forming a device structure on the SOI substrate, the device structure comprising a gate structure overlying the layer of silicon material, and the device structure comprising source/drain extension implant regions in the layer of silicon material;
• forming recesses in the layer of semiconductor material adjacent to the gate structure, while leaving remaining semiconductor material below the recesses;
• and
• at least partially filling the recesses with in situ doped semiconductor material.

A semiconductor device comprising:

• a substrate having a layer of semiconductor material;
• a gate structure overlying the layer of semiconductor material;
• source/drain recesses formed in the semiconductor material adjacent to the gate structure, such that remaining semiconductor material is located below the source/drain recesses;
• source/drain implant regions formed in the remaining semiconductor material;
• and
• epitaxially grown, in situ doped, semiconductor material in the source/drain recesses.