Method of fabricating semiconductor device
AssigneeHynix Semiconductor Inc.
InventorsYun-Seok CHO, Young-Kyun Jung, Chun-Hee Lee
Life of this patent
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Abstract
A method of fabricating a semiconductor device includes forming a plurality of pillar patterns on a substrate, filling a gap between the pillar patterns with a first conductive layer, forming a first hard mask layer pattern over the pillar patterns adjacent in one direction, etching the first conductive layer using the first hard mask layer pattern as an etch barrier, forming a second hard mask pattern over the pillar pattern adjacent in the other direction that crosses the one direction, and forming a gate electrode surrounding the pillar patterns by etching the first conductive layer etched using the second hard mask layer pattern as an etch barrier.
Claims15
A method of fabricating a semiconductor device, comprising:
- forming a plurality of pillar patterns on a substrate;
- filling a gap between the pillar patterns with a first conductive layer;
- forming a first hard mask layer pattern over the pillar patterns adjacent in one direction;
- etching the first conductive layer using the first hard mask layer pattern as an etch barrier;
- forming a second hard mask pattern over the pillar pattern adjacent in the other direction that crosses the one direction;
- and
- forming a gate electrode surrounding the pillar patterns by etching the first conductive layer etched using the second hard mask layer pattern as an etch barrier.
A method of fabricating a semiconductor device comprising:
- forming a plurality of pillar patterns on a substrate;
- forming an impurity region by doping impurity into the substrate at a base of the pillar pattern;
- forming a gate insulation layer so as to surround a pillar neck of each of the pillars;
- forming a first conductive layer over the gate insulation layer;
- forming a first mask layer pattern over the first conductive layer so that the width of the first mask layer pattern is wider than a width of the pillar pattern including a sidewall passivation layer and so that the first mask pattern extends in one direction as a line type mask pattern for forming a buried bit line by dividing the impurity region by about half;
- forming a first a first trench by etching the first conductive layer, the gate insulation layer, and a portion of the impurity region using the first mask layer pattern as an etch barrier;
- removing the first mask layer pattern;
- filling the first trench with a first insulation layer;
- forming a second mask layer pattern over the first insulation layer so that the second mask layer pattern extends in a direction crossing the removed first mask layer pattern;
- and
- forming a second trench by etching the first conductive layer pattern using the second mask pattern as an etch barrier, thereby forming a first conductive layer pattern that surrounds pillar patterns individually.
Dependencies are inferred from the claim text.