Device for reducing power consumption inside integrated circuit
AssigneeRichtek Technology Corporation
InventorYun-Chi Chiang
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Abstract
The present invention discloses a device for reducing power consumption inside an integrated circuit (IC), comprising: an IC including an up-gate transistor and a low-gate transistor electrically connected with each other, and a control circuit controlling the up-gate transistor and the low-gate transistor; and a resistor located outside the IC, the resistor having one end electrically connected with a node between the up-gate transistor and the low-gate transistor, or electrically connected with an upper end of the up-gate transistor.
Claims10
A device for reducing power consumption inside an integrated circuit (IC), comprising:
- an IC including an up-gate transistor and a low-gate transistor electrically connected with each other, and a control circuit controlling the up-gate transistor and the low-gate transistor;
- and
- a first resistor located outside the IC, the first resistor having one end electrically connected with a node between the up-gate transistor and the low-gate transistor.
The device of claim L, wherein the IC is a liquid crystal display power management circuit or a switching regulator.
A device for reducing power consumption inside an integrated circuit (IC), comprising:
- an IC including an up-gate transistor and a low-gate transistor electrically connected with each other, and a control circuit controlling the up-gate transistor and the low-gate transistor;
- and
- a first resistor located outside the IC, the first resistor having one end electrically connected with an upper end of the up-gate transistor.
Dependencies are inferred from the claim text.