Half cycle common path pessimism removal method

An automated integrated circuit design tool for reducing common path pessimism for half-cycle timing paths, the tool comprising program instructions storable on a computer readable medium, and executable by a processor to:

• receive a timing report for the IC, wherein the timing report includes a listing of circuit paths and corresponding path delay values;
• and
• for each source clock path and destination clock path of each half-cycle timing path:
• identify common circuit elements;
• determine a process, voltage, and temperature (PVT) path delay value corresponding to (PVT) scaling of each identified common circuit element;
• sum together PVT path delay values of each identified common circuit element to obtain a total PVT compensation value;
• generate a new total skew value by subtracting the total PVT compensation value from a total compensated skew value;
• and
• generate a corrected timing report that includes a new total skew values for each half-cycle circuit path having common circuit elements.

A system comprising:

• a memory configured to store program instructions which implement an automatic integrated circuit (IC) design tool for reducing common path pessimism for half-cycle timing paths of an IC;
• a processor coupled to the memory and configured to execute the program instructions to:
• receive a timing report for the IC, wherein the timing report includes a listing of circuit paths and corresponding path delay values;
• and
• for each source clock path and destination clock path of each half-cycle timing path:
• identify common circuit elements;
• determine a process, voltage, and temperature (PVT) path delay value corresponding to (PVT) scaling of each identified common circuit element;
• sum together PVT path delay values of each identified common circuit element to obtain a total PVT compensation value;
• generate a new total skew value by subtracting the total PVT compensation value from a total compensated skew value;
• and
• generate a corrected timing report that includes a new total skew values for each half-cycle circuit path having common circuit elements.