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US 2009/0212445 A1Published application
Semiconductor integrated circuit
AssigneeRohm Co., Ltd.
InventorYutaka MIMINO
Life of this patent
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Abstract
In a semiconductor integrated circuit, a second wiring layer includes a ground conductor having at least one opening formed therein. At least one opening is overlapped by at least one patch conductor included in a third wiring layer. At least one patch conductor and the ground conductor are electrically connected to each other by at least one via hole included in a second dielectric layer. A first wiring layer includes a signal line above the ground conductor.
Claims6
A semiconductor integrated circuit comprising:
- a first wiring layer;
- a first dielectric layer arranged adjacent to the first wiring layer;
- and
- a ground layer arranged adjacent to a surface of the first dielectric layer opposing a surface to which the first wiring layer is adjacent, wherein
- the ground layer includes
- a second wiring layer including a ground conductor having at least one opening formed therein,
- a second dielectric layer arranged adjacent to the second wiring layer, and
- a third wiring layer arranged adjacent to a surface of the second dielectric layer opposing a surface to which the second wiring layer is adjacent, and including at least one patch conductor each of which overlaps the corresponding opening, and
- each of the at least one of patch conductor is electrically connected to the ground conductor by at least one via hole included in the second dielectric layer.
6 more elements
A semiconductor integrated circuit comprising:
- a first wiring layer;
- a first dielectric layer arranged adjacent to the first wiring layer;
- and
- a ground layer arranged adjacent to a surface of the first dielectric layer opposing a surface to which the first wiring layer is adjacent, wherein
- the ground layer includes
- a second wiring layer including a plurality of conductors which are arranged at intervals and at least one of which is grounded,
- a second dielectric layer arranged adjacent to the second wiring layer, and
- a third wiring layer arranged adjacent to a surface of the second dielectric layer opposing a surface to which the second wiring layer is adjacent and including at least one patch conductor each of which overlaps the corresponding gap, and
- each of the at least one patch conductor is electrically connected to the conductor being in contact with the corresponding gap by at least one via hole included in the second dielectric layer.
6 more elements
Dependencies are inferred from the claim text.