Silicon-controlled rectifier (scr) device for high-voltage electrostatic discharge (esd) applications
AssigneesIntersil Americas Inc., University of Central Florida Research Foundation, Inc.
InventorsZhiwei Liu, Juin J. Liou, James E. Vinson
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Abstract
A silicon-controlled rectifier (SCR) device having a high holding voltage includes a PNP transistor and an NPN transistor, each transistor having both p-type and n-type dopant regions in their respective emitter areas. The device is particularly suited to high voltage applications, as the high holding voltage provides a device which is more resistant to latchup subsequent to an electrostatic discharge event compared to devices having a low holding voltage.
Claims21
A semiconductor device, comprising:
- a PNP bipolar transistor comprising an emitter formed in a PNP emitter area, wherein the PNP emitter area comprises:
- at least two separate segments having a p-type conductivity;
- at least two separate segments having an n-type conductivity;
- and
- an NPN bipolar transistor comprising an emitter formed in an NPN emitter area, wherein the NPN emitter area comprises:
- at least two separate segments having an n-type conductivity;
- and
- at least two separate segments having a p-type conductivity.
A semiconductor device, comprising:
- a PNP bipolar transistor comprising an emitter and a collector, wherein the PNP bipolar transistor collector has only a p-type conductivity;
- an NPN bipolar transistor comprising an emitter and a collector, wherein the NPN bipolar transistor collector has only an n-type conductivity;
- and
- wherein one of the PNP bipolar transistor emitter and the NPN bipolar transistor emitter has only one of the n-type conductivity and the p-type conductivity, and the other of the PNP bipolar transistor emitter and the NPN bipolar transistor emitter has both an n-type conductivity and a p-type conductivity.
17 The semiconductor device of claim 13, wherein the PNP bipolar transistor and the NPN bipolar transistor form an SCR with an asymmetrical segment ratio in the range between 0/2:1 to 1:3/0 inclusive.
A method for forming a semiconductor device, comprising:
- forming a PNP bipolar transistor and an NPN bipolar transistor using a method comprising:
- masking a PNP emitter area and an NPN emitter area with a first mask having openings therein;
- implanting n_type dopants through the openings in the first mask into both the PNP emitter area and the NPN emitter area to form at least two separate n-type segments in the PNP emitter area and at least two separate n-type segments in the PNP emitter area;
- masking the PNP emitter area and the NPN emitter area with a second mask having openings therein;
- and
- implanting p-type dopants through the openings in the second mask into both the PNP emitter area and the NPN emitter area to form at least two separate p-type segments in the PNP emitter area and at least two separate p-type segments in the NPN emitter area.
A method for forming a semiconductor device comprising a PNP bipolar transistor having an emitter and a collector and an NPN bipolar transistor having an emitter and a collector, wherein the method comprises:
- implanting the collector of the PNP bipolar transistor with dopants to have only a p-type conductivity;
- implanting the collector of the NPN bipolar transistor with dopants to have only an n-type conductivity;
- and either:
- implanting the emitter of the PNP bipolar transistor, but not the emitter of the NPN bipolar transistor emitter area, with p-type dopants;
- or
- implanting the emitter of the NPN bipolar transistor, but not the emitter of the PNP bipolar transistor emitter area, with n-type dopants.
Dependencies are inferred from the claim text.