Programming multilevel cell memory arrays

A method for programming a memory cell, comprising:

• if it is desired to alter a first page of a data value of the memory cell, shifting the memory cell from a first data state to a second data state;
• and
• if it is desired to alter a second page of the data value of the memory cell, shifting the memory cell to a third data state if the memory cell is in the first data state and shifting the memory cell to a fourth data state if the memory cell is in the second data state;
• wherein the first, second, third and fourth data states correspond to increasing and non-overlapping ranges of threshold voltages for the memory cell.

A memory device, comprising:

• an array of one or more multilevel memory cells each configured to store 2N data states, each data state assigned a non-overlapping threshold voltage range, where N is an integer value equal to or greater than 2;
• and
• control circuitry, wherein the control circuitry, during programming of a memory cell, is configured to:
• shift the threshold voltages of the one or more multilevel memory cells to an initial threshold voltage range;
• if N is greater than 2, for i=1 to N−2, shift a memory cell's threshold voltage (Vt) by 2N−i threshold voltage ranges if it is desired to change the ith bit of the pattern of N bits, wherein i is an integer value;
• subsequently shift the memory cell's Vt by one threshold voltage range if it is desired to change a next to last bit of the pattern of N bits;
• and
• subsequently shift the memory cell's Vt by two threshold voltage ranges if it is desired to change a last bit of the pattern of N bits.

A memory device, comprising:

• an array of memory cells logically arranged in rows and in columns;
• and
• control circuitry, wherein the control circuitry is configured to:
• shift a memory cell from a first data state to a second data state if it is desired to alter a first digit of a data value of the memory cell;
• and
• shift the memory cell to a third data state if the memory cell is in the first data state and shift the memory cell to a fourth data state if the memory cell is in the second data state, if it is desired to alter a second digit of the data value of the memory cell;
• wherein each data state is represented by a range of threshold voltages for each memory cell of the array of the memory cells;
• and
• wherein the first, second, third and fourth data states correspond to increasing and non-overlapping ranges of threshold voltages for each memory cell.