Integrated circuit including quench devices

A system comprising:

• a host;
• and
• a memory device communicatively coupled to the host, the memory device comprising:
• a bit line;
• a plurality of resistive memory cells coupled to the bit line;
• and
• at least two quench transistors coupled to the bit line, the quench transistors configured to quench a write signal on the bit line during a write operation of a memory cell.

A memory comprising:

• a bit line;
• phase change memory cells coupled to the bit line;
• and
• at least two means for quenching a write signal on the bit line during a reset operation of a memory cell.

A method for programming a memory, the method comprising:

• selecting a resistivity changing material memory cell to be programmed;
• applying a write signal to a line coupled to the selected memory cell;
• and
• selecting at least two quench devices coupled to the line to quench the write signal to complete the programming of the selected memory cell.

A method for programming a memory, the method comprising:

• selecting a phase change memory cell to be reset;
• applying a reset signal to a bit line coupled to the memory cell;
• and
• selecting at least two quench transistors coupled to the bit line to quench the reset signal to complete the resetting of the memory cell.