Circuit board having bypass pad

A printed circuit board (PCB) comprising:

• a core insulator having a first surface and a second surface opposite the first surface;
• bypass pads for testing an electrical circuit, the bypass pads formed on the first surface of the core insulator;
• external pads to be coupled with an external device, the external pads formed on the first surface of the core insulator;
• and
• a solder resist (SR) layer exposing the external pads and covering at least one of the bypass pads.

An electronic device comprising:

• an insulating substrate having a first surface and a second surface;
• a plurality of external pads on the first surface of the insulating substrate to be coupled with an external device;
• a semiconductor device overlying the second surface of the insulating substrate;
• and
• a plurality of bypass pads on the first surface of the insulating substrate for testing an electric circuit of the semiconductor device, wherein the external pads are exposed from the insulating substrate and one or more of the bypass pads are not exposed from an outer surface of the insulating substrate.

A device comprising:

• a PCB comprising:
• a core insulator having a first surface and a second surface;
• bypass pads for testing an electrical circuit, the bypass pads formed on the first surface of the core insulator;
• external pads to be coupled with an external device, the external pads formed on the first surface of the core insulator;
• and
• a solder resist exposing the external pads and covering at least one of the bypass pads;
• and
• a semiconductor chip overlying the PCB.

A system comprising:

• a PCB;
• a semiconductor memory chip overlying the PCB,
• wherein the PCB comprises:
• a plurality of external pads to be coupled with an external device;
• and
• a plurality of bypass pads for testing an electric circuit of the semiconductor chip, wherein the external pads are exposed and at least one of the plurality of bypass pads are not exposed from an outer surface of the PCB;
• and
• at least one of a controller and a CPU.

A system comprising:

• an electronic device including:
• a PCB;
• a semiconductor memory chip overlying the PCB,
• wherein the PCB comprises:
• a plurality of external pads to be coupled with an external device;
• and
• a plurality of bypass pads for testing an electric circuit of the semiconductor chip, wherein the external pads are exposed and at least one of the plurality of bypass pads are not exposed from an outer surface of the PCB;
• and
• a socket adapted to be coupled to the plurality of external pads;
• a card interface controller adapted to control the electronic device through the socket;
• and
• a host adapted to control the card interface controller,
• wherein the socket is adapted to allow insertion and contact with the electronic device.

A method of testing an electric circuit, the method comprising:

• providing a printed circuit board (PCB) comprising:
• a plurality of external pads to be coupled with an external device;
• and
• a plurality of bypass pads for testing an electric circuit, wherein the external pads are exposed and one or more of the bypass pads are not exposed from an outer surface of the PCB;
• removing a portion of the PCB to expose at least one of the plurality of bypass pads;
• and
• testing the electric circuit via the at least one of the plurality of bypass pads.

A method of forming a printed circuit board (PCB), comprising:

• providing a core insulator;
• forming external pads and bypass pads on a surface of the core insulator;
• and
• forming a solder resist layer on the surface of the core insulator, wherein the solder resist layer exposes the external pads and covers at least one of the bypass pads.