Rounded die configuration for stress minimization and enhanced thermo-mechanical reliability
AssigneeNational Semiconductor Corporation
InventorsLuu T. Nguyen, Vijaylaxmi Gumaste
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AssigneeNational Semiconductor Corporation
InventorsLuu T. Nguyen, Vijaylaxmi Gumaste
Estimating the term…
One aspect of the invention pertains to a semiconductor die with rounded sidewall junction edge corners. Such rounding reduces stress accumulations at those corners. In other embodiments of the invention, the sharpness of other corners and edges in the die are reduced. For example, reducing the sharpness of the bottom edge corners formed by the intersection of a sidewall and the back surface of a die can further diminish stress accumulations. One embodiment pertains to a wafer carried on a wafer support, where the wafer includes a multiplicity of such dice. Another embodiment involves a semiconductor package containing such dice. Methods of fabricating the dice are also described.
A semiconductor device, comprising:
A singulated semiconductor wafer carried on a wafer support, the wafer comprising a multiplicity of singulated dice, each die having a top surface, a bottom surface and a plurality of sidewalls, wherein the intersection between each pair of adjacent sidewalls defines a sidewall junction edge corner and wherein each sidewall junction edge corner is substantially rounded to reduce stress accumulations at the corners of the die.
A method of singulating a die from a wafer, comprising:
A semiconductor package comprising:
Dependencies are inferred from the claim text.