Precise Counter Hardware for Microcode Loops

A microcode unit for a processor, the microcode unit comprising:

• a microcode memory storing a plurality of microcode routines executable by the processor, each microcode routine comprising two or more microcode operations;
• and
• a sequence control unit coupled to the microcode memory, wherein the sequence control unit is configured to control reading microcode operations from the microcode memory to be issued for execution by the processor, and wherein the sequence control unit is configured to stall issuance of microcode operations forming a body of a loop in a first routine of the plurality of microcode routines until a loop counter value that indicates a number of iterations of the loop is received by the sequence control unit.

A processor comprising:

• a functional unit configured to execute a first microcode operation to provide a loop counter value to a microcode unit;
• and
• the microcode unit coupled to receive the loop counter value from the functional unit, wherein a microcode routine comprising the first microcode operation also comprises a plurality of microcode operations forming a body of a loop, wherein the loop counter value specifies a number of iterations of the loop, and wherein the microcode unit is configured to stall issuance of the plurality of microcode operations until the loop counter value is provided by the functional unit.