Filter circuit and filtering method for removing consecutive noise from sampled digital signals

A filter circuit for filtering an input signal in synchronism with a clock signal to output a first output signal, comprising:

• a first delay circuit operative in synchronism with the clock signal to produce at least three signals which are delayed in relation to the input signal by respective periods corresponding to one clock, two clocks and three clocks respectively;
• an average circuit averaging every two of the three delayed signals to calculate three average values;
• a differential circuit operative to the first output signal for calculating a difference of each of the three average values calculated by said average circuit from the first output signal to produce three differential values;
• a minimum value determination circuit determining which of the three differential values calculated by said differential circuit is a minimum differential value to output a second output signal which indicates the average value corresponding to the minimum differential value;
• a selector selecting one of the three average values which corresponds to the second output signal to output the selected average value as a third output signal;
• and
• a second delay circuit outputting the third output signal as the first output signal in synchronism with the clock signal,
• whereby every two of the three delayed signals are averaged, and one of the average values is determined which is closest to the previous value of the first output signal, the averaged value determined being output as the current value of the first output signal.