US 2009/0023264 A1 · METHOD OF MAKING PLANAR-TYPE BOTTOM ELECTRODE FOR SEMICONDUCTOR DEVICE

Abstract

A method of making planar-type bottom electrode for semiconductor device is disclosed. A sacrificial layer structure is formed on a substrate. Multiple first trenches are defined in the sacrificial layer structure, wherein those first trenches are arranged in a first direction. The first trenches are filled with insulating material to form an insulating layer in each first trench. Multiple second trenches are defined in the sacrificial layer structure between the insulating layers, and are arranged in a second direction such that the second trenches intersect the first trenches. The second trenches are filled with bottom electrode material to form a bottom electrode layer in each second trench. The insulating layers separate respectively the bottom electrode layers apart from each other. Lastly, removing the sacrificial layer structure defines a receiving space by two adjacent insulating layers and two adjacent bottom electrode layers.

Claims20

Dependent claims

A method of making capacitor bottom electrode of semiconductor device, and the method comprising:

forming a sacrificial layer structure on a substrate;
defining a plurality of first trenches in the sacrificial layer structure, wherein the first trenches are arranged in a first direction;
filling the first trenches with an insulating material to form an insulating layer in each of the first trenches;
defining a plurality of second trenches in the sacrificial layer structure, wherein the second trenches are arranged in a second direction, and the second direction intercrosses the first direction;
filling the second trenches with a bottom electrode material to form a bottom electrode layer in each of the second trenches, wherein the insulating layers separate respectively the bottom electrode layers;
and
removing the sacrificial layer structure to define a plurality of receiving rooms between neighboring bottom electrode layers and neighboring insulating layers.

4 more elements

A method of making capacitor bottom electrode of semiconductor device, and the method comprising:

forming a plurality of insulating layers on a substrate, wherein the insulating layers are arranged in a first direction;
and
forming a plurality of bottom electrode layers on the substrate, wherein the bottom electrode layers are arranged in a second direction, the second direction intercrosses the first direction, and the insulating layers separate respectively the bottom electrode layers to define a receiving room between each pair of the bottom electrode layers with an adjacent pair of the insulating layers.

Dependencies are inferred from the claim text.

Method of making planar-type bottom electrode for semiconductor device

Life of this patent

Method of making planar-type bottom electrode for semiconductor device

Life of this patent

Abstract

Claims20