Method for fabricating embedded static random access memory

A method for fabricating an embedded static random access memory, comprising:

• providing a semiconductor substrate, the semiconductor substrate defining a logic area and a memory cell area, wherein at least an NMOS transistor area and at least a PMOS transistor area are defined in the logic area, and at least a pull-up transistor area and at least a pull-down transistor area are defined in the memory cell area;
• forming a patterned mask on the pull-up transistor area, pull-down transistor area in the memory cell area and the PMOS transistor area in the logic area, and exposing the NMOS transistor area in the logic area;
• performing an N type ion implantation process on the exposed NMOS transistor area in the logic area;
• and
• removing the patterned mask.

A method for fabricating an embedded static random access memory, comprising:

• providing a semiconductor substrate, the semiconductor substrate defining a logic area and a memory cell area, wherein at least a NMOS transistor area and at least a PMOS transistor area are defined in the logic area, and at least a pull-up transistor area and at least a pull-down transistor area are defined in the memory cell area;
• forming a patterned mask on the pull-up transistor area, pull-down transistor area in the memory cell area and the NMOS transistor area in the logic area, and exposing the PMOS transistor area in the logic area;
• performing a P type ion implantation process on the exposed PMOS transistor area in the logic area;
• and
• removing the patterned mask.