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US 2009/0020784 A1Published application
Method for designing semiconductor device and semiconductor device
AssigneeMatsushita Electric Industrial Co., Ltd.
InventorsTakayuki Araki, Fumihiro Kimura, Junichi Shimada, Kazuhisa Fujita
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Abstract
A method for designing a semiconductor device and a semiconductor device of the present invention permits the achievement of a predetermined pattern area ratio while power supply lines are reinforced by connecting a dummy metal line, which is formed in an unoccupied region of a wiring layer for the purpose of achieving the predetermined area ratio, at its two or more points with a power supply line for VDD or VSS.
Claims3
1-5. (canceled)
A semiconductor device comprising:
- a plurality of wiring layers;
- a power voltage supply unit;
- and
- a plurality of power supply lines connected to the power voltage supply unit or ground and arranged in a grid-like form,
- wherein, when some of the plurality of power supply lines connected to the power voltage supply unit are first power supply lines and the other ones of the plurality of power supply lines connected to the ground are second power supply lines, a plurality of pairs of the first and second power supply lines are formed in one of the wiring layers, two of the first power supply lines are adjacent to each other, and two of the second power supply lines are adjacent to each other,
- a first dummy metal line is formed between adjacent two of the first power supply lines so as to be connected to the power voltage supply unit, and
- a second dummy metal line is formed between adjacent two of the second power supply lines so as to be connected to the ground.
4 more elements
7-14. (canceled)
Dependencies are inferred from the claim text.