Flash Anneal for a PAI, NiSi Process

A MOSFET comprising:

• a substrate with a gate structure comprising;
• a gate oxide layer;
• a gate electrode layer, and
• a source and drain region in which impurity ions have been implanted;
• an amorphous layer within the source and drain region;
• a silicide layer within the amorphous layer;
• and
• a flash annealed conductive source/drain region.

A method of manufacturing a semiconductor device, the method comprising:

• providing a substrate with at least a gate structure comprising;
• a gate oxide layer;
• a gate electrode layer;
• and
• a source and drain region in which impurity ions have been implanted;
• generating an amorphous layer in the source and drain region using a Xenon two step PAI process;
• depositing a Ni metal on the amorphous layer;
• forming a Ni silicide layer within the amorphous layer;
• and
• flash annealing the substrate.