Controlling timing dependencies in a mixed signal system-on-a-chip (soc)
AssigneeAltaSens, Inc.
InventorsRoberto Marchesini, Laurent Blanquart, Qianjiang Mao, John D. Wallner
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AssigneeAltaSens, Inc.
InventorsRoberto Marchesini, Laurent Blanquart, Qianjiang Mao, John D. Wallner
Estimating the term…
The claimed subject matter provides systems and/or methods that facilitate controlling timing dependencies in a mixed signal circuit. Timing performance associated with a horizontal scanner and an analog to digital converter (ADC) can be monitored. Moreover, data related to the monitored timing performance can be leveraged to modify timing parameter(s) of clocks that coordinate operations of the horizontal scanner and the ADC (e.g., and/or digital component(s) included in the mixed signal circuit). For example, the clocks associated with the horizontal scanner and the ADC can be independently tuned to optimize mixed signal circuit performance.
A system that configures independent clock trees within a mixed signal circuit, comprising:
A method that facilitates controlling timing dependencies, comprising:
A system that facilitates dynamically altering timing parameters within a mixed signal circuit, comprising:
Dependencies are inferred from the claim text.