Four-Terminal Reconfigurable Devices

A method of fabricating a reconfigurable device, the method comprising the steps of:

• providing a substrate;
• forming a first dielectric layer on the substrate;
• forming a conductive layer recessed into at least a portion of a side of the first dielectric layer opposite the substrate;
• depositing a second dielectric layer over the side of the first dielectric layer opposite the substrate, so as to cover the conductive layer;
• forming a heater on a side of the second dielectric layer opposite the first dielectric layer;
• depositing a third dielectric layer over the side of the second dielectric layer opposite the first dielectric layer so as to surround at least a portion of the heater;
• forming at least one programmable via extending through the second and third dielectric layers, extending through and surrounded by the heater and in contact with the conductive layer, the programmable via comprising at least one phase change material;
• forming, a capping layer over the programmable via;
• forming a first conductive via and a second conductive via each extending through the third dielectric layer and in contact with the heater;
• and
• forming a third conductive via extending through the second and third dielectric layers and in contact with the conductive layer.

A method of performing a logic function, the method comprising the steps of:

• providing a reconfigurable device comprising:
• a substrate;
• a first dielectric layer on the substrate;
• a conductive layer recessed into at least a portion of a side of the first dielectric layer opposite the substrate;
• at least one second dielectric layer over the side of the first dielectric layer opposite the substrate, so as to cover the conductive layer;
• a heater within the second dielectric layer;
• at least one programmable via extending through the second dielectric layer, extending through and surrounded by the heater and in contact with the conductive layer, the programmable via comprising at least one phase change material;
• a capping layer over the programmable via,
• a first conductive via and a second conductive via, each extending through the second dielectric layer and in contact with the heater, and
• a third conductive via extending through the second dielectric layer and in contact with the conductive layer;
• and
• passing one or more of:
• an OFF switching pulse through the heater, when the programmable via is in a conductive state, the OFF switching pulse being configured to amorphize at least a portion of the phase change material in the programmable via to switch the programmable via to a resistive state, and
• an ON switching pulse through the heater, when the programmable via is in a resistive state, the ON switching pulse being configured to anneal at least a portion of the phase change material in the programmable via to switch the programmable via to a conductive state.

An integrated logic circuit comprising:

• a plurality of logic blocks;
• and
• at least one reconfigurable device interconnecting two or more of the logic blocks, the reconfigurable device comprising:
• a substrate;
• a first dielectric layer on the substrate;
• a conductive layer recessed into at least a portion of a side of the first dielectric layer opposite the substrate;
• at least one second dielectric layer over the side of the first dielectric layer opposite the substrate, so as to cover the conductive layer;
• a heater within the second dielectric layer;
• at least one programmable via extending through the second dielectric layer, extending through and surrounded by the heater and in contact with the conductive layer, the programmable via comprising at least one phase change material;
• a capping layer over the programmable via;
• a first conductive via and a second conductive via, each extending through the second dielectric layer and in contact with the heater;
• and
• a third conductive via extending through the second dielectric layer and in contact with the conductive layer.