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US 2008/0313580 A1Published application
Methodology for Hierarchy Separation at Asynchronous Clock Domain Boundaries for Multi-Voltage Optimization Using Design Compiler
AssigneeTexas Instruments Incorporated
InventorsAlok Anand, Sajish Sajayan
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Abstract
This invention transforms a circuit design at an asynchronous clock boundary using a flow involving register grouping, logic modification and level shifter and isolation cell insertion. The level shifter and isolation cell inserted are tested for proper location. The transformed circuit design is suitable for power consumption control by independent control of separate voltage domains.
Claims9
A method for conversion of a circuit design from a first form into a circuit design of a second form having separable voltage domains suitable for power consumption control comprising the steps of:
- grouping registers within the circuit design;
- grouping input and gated clocks within the circuit design;
- identifying cells for duplication in the circuit design;
- duplicating the identified cells;
- creating new connections within a new hierarchy;
- removing redundant logic elements;
- and
- inserting level shifters and isolation cells in boundaries between voltage domains.
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