Power Partitioning Memory Banks
AssigneeNXP B.V.
InventorsSainath Karlapalem, Milind Manohar Kulkarni
Life of this patent
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Abstract
The present invention comprises a plurality of memory banks (102, 103) with independent power controls (110) such that any memory banks (102, 103) not actively engaged in storing partitioned data can be powered down by dynamic voltage scaling. A memory management unit (112) is used to re-map partitions so they occupy fewer banks of memory, and a re-partition processor (102) is used to compute how partitions can be packed and squeezed together to use fewer banks of memory. Overall system power dissipation is therefore reduced by limiting the number of memory banks (102, 103) being powered up.
Claims7
A circuit, comprising:
- at least two banks of memory for which power consumption can be independently and individually controlled;
- a power controller connected to supply each of the banks of memory such that at least one memory bank can be powered down to conserve power;
- a memory management unit (MMU) for mapping the banks of memory into a memory space;
- and a processor (CPU) for computing memory mapping and partitioning, and connected to instruct the MMU to re-map and re-partition memory, and connected to command the power controller to reduce the number of banks of memory powered.
A method for conserving operating power in a memory system, comprising:
- re-mapping and re-partitioning tasks across more than one independently powered memory bank by applying dynamic voltage scaling to any memory banks that have been idled of storage duties;
- testing if any task partitions are spread across more than one memory bank;
- inspecting a current organization of task partitions and memory banks to see if a simple re-mapping can provide power reduction benefits;
- re-mapping task partitions in the memory banks;
- inspecting further to see if some packing of the memory banks can be done by re-partitioning smaller and re-mapping into fewer memory banks;
- and re-partitioning tasks and re-mapping to fewer numbers of banks of memory.
A microcomputer system for a personal digital assistant, comprising:
- at least two banks of memory for which power consumption can be independently and individually controlled;
- a power controller connected to supply each of the banks of memory such that at least one memory bank can be powered down to conserve power;
- a memory management unit (MMU) for mapping the banks of memory into a memory space;
- and a processor (CPU) for computing memory mapping and partitioning, and connected to instruct the MMU to re-map and re-partition memory, and connected to command the power controller to reduce the number of banks of memory being powered.
Dependencies are inferred from the claim text.