Processor for Virtual Machines and Method Therefor

A method for transferring data in a data processing unit comprising:

• accessing a first value from a first data storage component of the data processing unit;
• combining the first value with a base address to produce a first address, the base address representative of an area in a memory;
• accessing a second value from a second data storage component of the data processing unit;
• accessing a third value from a third data storage component of the data processing unit;
• combining the second value with a value stored in a location in the memory indicated by the first address to produce a fourth value;
• comparing the third value with the fourth value to produce a comparison result;
• and
• based on the comparison result, either accessing the memory beginning at a location indicated by a second address or performing an exception operation, the second address being computed from the base address.

A memory control logic for accessing a re-programmable non-volatile memory comprising:

• write detection logic to determine when a write operation to the memory is being performed;
• address detection logic configured to indicate a detected address when a destination address associated with a write operation falls within a first range of addresses;
• and
• write-control logic operatively coupled to the address detection logic and configured to perform a shallow-write operation of data associated with the write operation when the address detection logic indicates a detected address.