Resource management in multi-processor system
AssigneeQUALCOMM Incorporated
InventorsJames M Brown, Thomas Fortier
Life of this patent
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Abstract
Resource management techniques in multi-processor systems are described. Embodiments include a multi-processor system having a primary processor for communication with pipelined secondary processors. The secondary processors include registers containing status information for tasks executed by the respective secondary processors. The primary processor is provided with direct access to contents of the registers and manages computational and memory resources of the multi-processor system based on the acquired status information.
Claims31
An integrated circuit (IC) comprising:
- a multi-processor system including a primary processor and a plurality of pipelined secondary processors for communication with the primary processor, at least one of the secondary processors including a register directly accessible by the primary processor and containing status information for tasks executed by the at least one secondary processor.
A multi-processor system comprising:
- a primary processor;
- and
- a plurality of pipelined secondary processors for communication with the primary processor, at least one of the secondary processors including a register directly accessible by the primary processor and containing status information for tasks executed by the at least one secondary processor.
A multi-processor system comprising:
- a primary processor;
- and a plurality of pipelined secondary processors for communication with the primary processor, at least one of the secondary processors including first means directly accessible by the primary processor for storing status information on tasks executed by the at least one secondary processor.
A computer program product including a computer readable medium having instructions for causing a multi-processor system including a primary processor and pipelined secondary processors to:
- form registers selectively containing status information for tasks executed by at least some of the secondary processors;
- provide the primary processor with direct access to the registers;
- and
- manage computational and/or memory resources of the multi-processor system based on the status information.
A method for managing computational and/or memory resources in a multi-processor system including a primary processor and pipelined secondary processors, comprising:
- forming registers selectively containing status information for tasks executed by at least some of the secondary processors;
- providing the primary processor with direct access to the registers;
- and
- managing computational and/or memory resources of the multi-processor system based on the status information.
Dependencies are inferred from the claim text.