An origin compute node capable of direct memory access (‘DMA’) transfer completion notification, the compute node comprising a direct memory access (‘DMA’) controller, an origin DMA engine installed upon the DMA controller, a computer processor, computer memory operatively coupled to the computer processor, the DMA controller, and the origin DMA engine, the computer memory having disposed within it computer program instructions capable of:
- determining, by an origin DMA engine on an origin compute node, whether a data descriptor for an application message to be sent to a target compute node is currently in an injection first-in-first-out (‘FIFO’) buffer in dependence upon a sequence number previously associated with the data descriptor, the total number of descriptors currently in the injection FIFO buffer, and the current sequence number for the newest data descriptor stored in the injection FIFO buffer;
- and
- notifying a processor core on the origin compute node that the message has been sent if the data descriptor for the message is not currently in the injection FIFO buffer.